Temporary bonding and low-stress debonding for thin wafers
Thin wafers, backside processing and fan-out reconstituted wafers can warp, break or become difficult to handle without temporary carrier support.
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EV Group
Capabilities
Wafer bonding · lithography · temporary bond and debond
HBM2.5D / 3DFAN-OUT / WLPCHIPLET / HYBRID BONDINGThin wafers, FoWLP and 3D integration3D IC, memory stacking, BSI CIS and hybrid bondingChiplets, 3D ICs and heterogeneous integration
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Related solutions
GEMINI FB XT 300 mm fusion and hybrid wafer bonding
3D IC and memory stacking require controlled cleaning, activation, face-to-face alignment, bonding and post-bond overlay on 300 mm wafers to avoid defects from thermal mismatch and topography errors.
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EVG 320 D2W cleaning and surface activation for hybrid bonding
Direct-placement die-to-wafer hybrid bonding needs clean, bond-ready die and wafer surfaces before placement; particles, organic residue or inconsistent activation can reduce bond yield and interface reliability.
Official website ↗Official materials
02
Related questions
In an EV Group temporary-bonding and debonding flow for thin wafers, how should bow be tracked through bonding, thinning and debonding to separate adhesive, carrier and process stress?
For 300 mm fusion or hybrid bonding on the EVG GEMINI FB XT, what incoming limits should be set for wafer bow, nanotopography, Cu dishing or protrusion and particles, and how should their relationship to voiding and bond yield be validated?
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