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Low-warpage lidded flip-chip package on a thin substrate

SHINKO ELECTRIC INDUSTRIES · Package architecture and warpage compensation

Purpose
High-power flip-chip packages must conduct heat into a top-side lid while controlling warpage from thin substrates and molded structures.
Technical approach
Exposes the die backside from the mold and connects it to a metal lid through TIM; the molded exposed-die structure and thin-core substrate are co-designed for heat flow, stiffness and warpage control.
Scope of use
Relevant to server processors, SSD controllers, image processors and high-heat automotive ICs, with die size, bumps or Cu pillars, underfill, TIM, lid and substrate stack co-designed.
Limitations and open questions

These evaluation considerations are compiled by BLNKK from public information. They are not supplier guarantees or a mandatory submission checklist.

Scope and limitations

This is an integrated package/assembly route, not a drop-in material. Published dimensions and automotive uses do not guarantee a customer design; the built-in-component option remains under development.

What to prepare

Bring die size/power, interconnects, substrate stackup, TIM/lid concepts and warpage/thermal-resistance targets, plus board-assembly and reliability requirements.

Confirm with the supplier

Confirm substrate/lid options, assembly conditions and design responsibilities, with thermal, warpage and reliability data for the proposed stack. Agree device qualification for automotive use and confirm option maturity separately.

Public evidence
The official page lists exposed-die molding, a 200 µm core and 4–6 substrate layers; the 2022 sheet also notes prior automotive-device use. The AEC-Q100 Grade 2 statement does not qualify every custom package.

Supporting references

Contact the supplier

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Related engineering problems

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BLNKK organizes information from public sources. A company profile does not imply a documented solution. Applicability still needs confirmation against your samples and engineering conditions.