S-SWIFT organic RDL fan-out-on-substrate heterogeneous integration
Amkor Technology · Package architecture and warpage compensation
- Purpose
- Multi-die and memory integration needs dense, short die-to-die connections while balancing package size, electrical performance, cost and thermomechanical behavior.
- Technical approach
- High-density organic RDL connects the dies within a fan-out module, which is flip-chip mounted on a high-I/O BGA substrate as an alternative to a large silicon-interposer architecture.
- Scope of use
- Amkor lists AI/HPC, networking, ASIC/HBM and mobile multi-die uses. Co-design the RDL, mold, substrate, lid and cooling configuration for the actual package.
- Limitations and open questions
These evaluation considerations are compiled by BLNKK from public information. They are not supplier guarantees or a mandatory submission checklist.
Scope and limitationsThis is a packaging integration platform. Lower module warpage at reflow does not ensure lower whole-package warpage; the paper shows temperature, lid and substrate material effects, and its test vehicle is not a universal reliability qualification.
What to prepareBring die layout, interconnect pitch/I/O, package dimensions, electrical and cooling targets, plus materials, reflow conditions, coplanarity limits and reliability needs for an architectural comparison.
Confirm with the supplierConfirm current RDL/substrate design rules, stack-up and lid options, and the plan for design-specific warpage simulation, measurement and reliability validation. Establish cost and lead time for the actual proposal.
- Public evidence
- The product page and 2024 technology sheet describe fan-out-on-substrate integration. The 2020 paper reports warpage/stress simulations and separate test-vehicle reliability results, each tied to specific structures and materials.
Supporting references
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BLNKK organizes information from public sources. A company profile does not imply a documented solution. Applicability still needs confirmation against your samples and engineering conditions.