Kelvin / chain resistance decomposition
First add stage, layout, and probe controls.
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Compare each solution's purpose, inputs and limits.
For “High initial RDL via contact resistance”, check what each solution can answer before planning validation.
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BLNKK assessment notes
Update engineering conditions →Your next step
Compare purposes and limits now. Confirm key sample conditions before planning validation.
0 solutions selected0 of 4 relevant conditions confirmedNo solutions selected; these notes cover the current engineering problem.
Priority items to confirm · 4
01An initial RDL via anomaly has been localizedUnconfirmed
Has high resistance been localized to an RDL interlayer via structure before stress?
Separate initial measurements from drift after thermal stress; total chain resistance does not directly localize a single via.
Update engineering conditions →02Layout and measurement-error controls are completeUnconfirmed
Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?
Four-wire measurements can reduce lead errors; a chain still includes trace segments and multiple vias. Compare layouts rather than simply dividing by via count.
Update engineering conditions →03Targeted opening / interface samples are comparableUnconfirmed
Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?
Localize electrically before sampling; cross-section preparation may alter interfaces, and one via does not represent the entire batch.
Update engineering conditions →04Interface-treatment and seed histories are comparableUnconfirmed
Are comparable controls available for opening formation, degas / pre-clean, seed deposition, and wait-time histories?
Compare only with structures and measurements held fixed; high-aspect-ratio TSV coverage capabilities are not evidence for this RDL via.
Update engineering conditions →Relevant assessment paths
Localize openings and bottom contacts
First add electrical locations and normal / anomalous interfaces.
Interface-cleaning and seed comparisons
First add error controls, interface samples, and process histories.
Assessment preparation checklist
Discussion preparation based on the relevant engineering conditions; not mandatory supplier requirements or a record of evidence already available.
- An initial RDL via anomaly has been localized
- Layout and measurement-error controls are complete
- Targeted opening / interface samples are comparable
- Interface-treatment and seed histories are comparable
Check the comparison table above for each solution’s specific inputs and applicability limits.
Questions to discuss
- What are the Kelvin / chain sense scope and normal controls?
- Did the high reading occur initially or after thermal stress, and where is the targeted interface?
- How are opening formation, wait time, pre-clean, and seed histories kept comparable?
Public references · 17
- Tektronix / Keithley · Two-Wire vs. Four-Wire Resistance Measurements ↗
View source notes and limits
Four-wire Kelvin measurements separate force and sense connections to reduce lead errors in low-resistance measurements.
A general measurement method; without accessible sense structures, it cannot isolate a single via, nor does it eliminate all layout or probe errors.
- ASE · Failure Analysis Lab ↗
View source notes and limits
Lists capabilities for electrical failure localization, nondestructive X-ray inspection, and targeted cross-section / FIB analysis.
The service list does not guarantee detection rates at every RDL or microvia scale; sampling, structures, and destructive risks require confirmation.
- KLA / SPTS · SPTS Etch and Deposition Processes for Advanced Packaging ↗
View source notes and limits
UBM / RDL PVD uses degas and pre-clean to improve Rc; TSV barrier / seed coverage capabilities are listed separately.
Manufacturer capabilities from 2022; TSV coverage does not establish coverage for arbitrary RDL vias, and no cleaning or opening recipe is provided for this topic.
- Keysight Technologies · B2902C four-wire contact-resistance measurement ↗
View source notes and limits
Keysight's resistance page lists B2902C; the B2900C/CL guide explains Kelvin connections, lead error and resistance compensation.
Scope and limitations Four-wire sensing does not isolate a buried contact without separate terminals. Fixtures and settings affect accuracy; capture of every transient open is not guaranteed. What to prepare BLNKK suggests structure and terminal drawings, expected resistance, allowable test current, temperature conditions and repeated measurements. Confirm with the supplier Confirm Kelvin fixtures, current/integration settings, thermal-EMF compensation, system uncertainty and time resolution.
- Entegris · ST-250 copper post-etch residue cleaner ↗
View source notes and limits
The product page, catalog entry and November 2017 datasheet provide applications and condition-specific material/cleaning evidence.
Scope and limitations Evidence does not qualify every RDL polymer or establish root cause from cleaning results. The datasheet explicitly prohibits IPA as an intermediate rinse. What to prepare BLNKK suggests documenting residues, films, temperature/time and rinsing, comparing metal loss, roughness, dielectric condition and contact resistance before/after cleaning. Confirm with the supplier Confirm material/equipment compatibility, opening-specific cleaning/rinse recipes, current safety/use documents and relevant evaluation data.
- Chroma ATE · 16502 four-wire interconnect resistance comparison ↗
View source notes and limits
Chroma documents four-wire operation, thermal-EMF cancellation and temperature compensation; temperature probes and scanning are optional.
Scope and limitations Chain resistance does not automatically isolate one via; display range is not single-via resolution. Control contacts, thermal EMF and self-heating. What to prepare BLNKK suggests preparing contact diagrams, chain counts, expected resistance, allowable current, fixtures and temperature records. Confirm with the supplier Confirm connections, zeroing, repeatability, pulse/dry-circuit conditions, temperature-compensation method and required options.
- Nagase ChemteX · Nagase ChemteX N-SC238 dry-film resist stripper ↗
View source notes and limits
The named section describes negative DFR removal, low material damage and example processing.
Scope and limitations Vendor low-damage wording does not guarantee every stack or residue/ionic-cleanliness result. This is not buried-interface cleaning, electrical diagnosis or finished-via repair. What to prepare BLNKK suggests resist/thickness, stacks and strip/rinse/dry conditions, with surface-loss, ionic-residue and subsequent-resistance comparisons. Confirm with the supplier Confirm resist compatibility, process window, bath loading/replacement, rinse/dry method, current SDS and sample evaluation.
- Synopsys · QuantumATK atomic-interface transport comparison ↗
View source notes and limits
The semiconductor datasheet describes interconnect/barrier-metal interface resistance calculations; the product page explains the available atomistic methods.
Scope and limitations Results depend on the modeled interface and method. Defects or contamination outside that model cannot be ruled out; calculations do not replace contact-resistance or process validation. What to prepare BLNKK suggests gathering metal/barrier compositions, interface assumptions, process differences and contact-resistance measurements for model-to-experiment comparison. Confirm with the supplier Confirm the required modules, interface construction, convergence checks, experimental calibration and deliverable transport analyses.
- Filmetrics · Filmetrics R54 metal-film sheet-resistance comparison ↗
View source notes and limits
KLA lists contact and non-contact R54 configurations.
Scope and limitations Probe configurations have different ranges. Thickness/resistivity conversion requires a known input; sheet resistance alone cannot establish both. What to prepare BLNKK suggests preparing material, thickness references, sample geometry, locations and process controls, alongside separate via Kelvin/chain data. Confirm with the supplier Confirm probes, geometric corrections, usable areas, calibration, conversion assumptions and outputs.
- Tokyo Ohka Kogyo Co., Ltd. · TOK ST-120 thick-resist stripping solution ↗
View source notes and limits
The named body/table describes stripping and rinsing, not residuals, corrosion or contact-resistance results for this RDL.
Scope and limitations It cannot expose buried interfaces or repair formed contacts. Low damage is not zero corrosion, and example conditions are not universal recipes. What to prepare BLNKK suggests gathering resist grade/thermal history, residue locations, stack materials, current soak/rinse processes and residue/contact-resistance baselines. Confirm with the supplier Confirm applicable resists, solution use/replacement, temperature/time and rinsing, plus criteria for residue, metal damage and electrical comparisons.
- ULVAC, Inc. · NA-1500 panel organic-residue plasma removal ↗
View source notes and limits
The NA-1500 page lists applications and low-temperature capability, not a project recipe.
Scope and limitations Published uses do not qualify arbitrary blind vias or guarantee undamaged exposed materials. Residue and compatibility need sample validation. What to prepare BLNKK suggests preparing film, geometry, exposed-metal and temperature details, with before/after material-loss, surface and electrical observations. Confirm with the supplier Confirm panel/material suitability, recipe and temperature control, plus methods to validate internal residue and subsequent contact.
- Rigaku · NEX CG II multilayer metal-film analysis ↗
View source notes and limits
Official pages describe multilayer films and distinguish standardless semi-quantitative analysis from quantitative analysis using standards.
Scope and limitations Spot-averaged film data do not directly establish via-wall continuity, local oxidation states or electrical contact quality. What to prepare BLNKK suggests preparing the layer sequence, materials and estimated thicknesses, coupon dimensions and reference samples, with comparison locations. Confirm with the supplier Confirm the model, spot size, calibration/reference method and sample-specific measurement uncertainty.
- HIOKI · RM3545A Kelvin resistance comparison ↗
View source notes and limits
Official information documents four-terminal resistance and contact-check configurations.
Scope and limitations Four terminals do not isolate every on-sample conductor contribution. One reading cannot locate a particular via; resolution is not total uncertainty. What to prepare BLNKK suggests Kelvin/reference structures, expected resistance, permitted current and temperature conditions to assess self-heating and fixture repeatability. Confirm with the supplier Confirm current/low-power settings, probes, fixtures, compensation, uncertainty and any switching options.
- JEOL · JSM-IT810 SEM / EDS cross-section analysis ↗
View source notes and limits
JEOL’s May 30, 2025 presentation shows IC bonding-section imaging and elemental analysis after cross-section polishing.
Scope and limitations Cross-section preparation alters the specimen; this is not intact-package non-destructive inspection. EDS does not directly determine contact resistance or bond strength. What to prepare BLNKK suggests failure locations, contact structures/electrical results, target elements, sacrificial samples and preparation records. Confirm with the supplier Confirm section targeting/preparation, EDS detection/quantification conditions, detectors and automation/calibration configuration.
- JSR · ELPAC WPR photo-imageable dielectric ↗
View source notes and limits
JSR’s May 2025 PID panel identifies WPR; its current application page describes redistribution, photo-imageable insulation and passivation.
Scope and limitations Other developmental series appear in the same material; their specifications are not WPR specifications. Dielectric selection alone does not resolve contact resistance or guarantee reduced warpage. What to prepare BLNKK suggests film/via geometry, metals/interfaces, exposure/development flow, thermal budget and resistance-failure records. Confirm with the supplier Confirm WPR grade, development/cure conditions, residue and adhesion evaluation, material data, availability and process qualification.
- Toray Industries · PHOTONEECE photodefinable polyimide ↗
View source notes and limits
The primary tables and semiconductor portfolio identify applications and distinct standard/K series. Individual grade data remain necessary.
Scope and limitations The family name does not establish universally low cure temperature, low warpage or NMP-free chemistry. A patterned via does not establish clean contacts or acceptable resistance. What to prepare BLNKK suggests preparing features, thickness, metal surfaces, lithography equipment and cure budget, with adhesion, shrinkage, moisture and contact-resistance checks. Confirm with the supplier Confirm the exact grade, tone, solvent/developer and cure process. Request current TDS and relevant post-cure property, adhesion and reliability data.
- Veeco · WaferStorm advanced-packaging wet processing ↗
View source notes and limits
The November 2024 order announcement lists applications; the August 2024 IBM development announcement explains immersion/spray and the collaboration.
Scope and limitations Announcements establish applications and mechanism, not universal material compatibility. Residue removal does not establish lower contact resistance or higher bonding yield. What to prepare BLNKK suggests residues, upstream processing, via geometry, exposed materials, wafer format and permitted chemistry/damage limits, with before/after surface and electrical results. Confirm with the supplier Confirm trial recipe, immersion/spray setup, compatibility, handling and acceptance criteria. For RDL vias, agree on residue, metal-damage and contact-performance checks.
Full assessment recordExpand for all conditions, path rules and original assessment notes.
Current assessment and next steps
Based on reported conditions and public sources. Ready to assess does not establish sample applicability or root cause. Order does not identify the best solution.
Known conditions · 0
Key unknowns · 4
- Has high resistance been localized to an RDL interlayer via structure before stress?Separate initial measurements from drift after thermal stress; total chain resistance does not directly localize a single via.
- Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?Four-wire measurements can reduce lead errors; a chain still includes trace segments and multiple vias. Compare layouts rather than simply dividing by via count.
- Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?Localize electrically before sampling; cross-section preparation may alter interfaces, and one via does not represent the entire batch.
- Are comparable controls available for opening formation, degas / pre-clean, seed deposition, and wait-time histories?Compare only with structures and measurements held fixed; high-aspect-ratio TSV coverage capabilities are not evidence for this RDL via.
Paths to assess
Kelvin / chain resistance decomposition
First add stage, layout, and probe controls.
- Has high resistance been localized to an RDL interlayer via structure before stress?
- Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?
Conditions that change this path
- Has high resistance been localized to an RDL interlayer via structure before stress?Supports assessment: An initial RDL via anomaly has been localized · Unsuitable for now: Only post-stress anomalies or other structures are available
- Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?Supports assessment: Layout and measurement-error controls are complete · Unsuitable for now: Only unresolved total resistance is available
Localize openings and bottom contacts
First add electrical locations and normal / anomalous interfaces.
- Has high resistance been localized to an RDL interlayer via structure before stress?
- Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?
Conditions that change this path
- Has high resistance been localized to an RDL interlayer via structure before stress?Supports assessment: An initial RDL via anomaly has been localized · Unsuitable for now: Only post-stress anomalies or other structures are available
- Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?Supports assessment: Targeted opening / interface samples are comparable · Unsuitable for now: Only unaligned cross-sections or final values are available
Interface-cleaning and seed comparisons
First add error controls, interface samples, and process histories.
- Has high resistance been localized to an RDL interlayer via structure before stress?
- Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?
- Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?
- Are comparable controls available for opening formation, degas / pre-clean, seed deposition, and wait-time histories?
Conditions that change this path
- Has high resistance been localized to an RDL interlayer via structure before stress?Supports assessment: An initial RDL via anomaly has been localized · Unsuitable for now: Only post-stress anomalies or other structures are available
- Are traceable Kelvin / chain layouts, force / sense connections, and probe-contact controls available?Supports assessment: Layout and measurement-error controls are complete · Unsuitable for now: Only unresolved total resistance is available
- Are openings, bottom residue, and seed-contact cross-sections aligned for anomalous and normal vias?Supports assessment: Targeted opening / interface samples are comparable · Unsuitable for now: Only unaligned cross-sections or final values are available
- Are comparable controls available for opening formation, degas / pre-clean, seed deposition, and wait-time histories?Supports assessment: Interface-treatment and seed histories are comparable · Unsuitable for now: Shared interface / seed histories are missing
What to do next
No result provided. Clarify key conditions before arranging an assessment.
- Has high resistance been localized to an RDL interlayer via structure before stress?
What to prepare
- Force / sense layout; initial chain measurements and normal controls; probe and measurement-current settings
- Initial net / via coordinates; Normal and anomalous samples; Layer stack and cross-section orientation
- Layout-based resistance decomposition and targeted cross-sections; Degas / pre-clean / seed histories; Process controls with shared geometry
- Suitable for low-resistance devices or test structures with accessible measurement terminals. Kelvin-via and RDL structures need corresponding connection layouts.
- The named catalog entry lists Cu/WLP; detailed documentation centers on copper dual damascene, requiring RDL-film and rinse compatibility confirmation.
- Conductors and interconnect coupons need separate current/sense access and validated excitation and measurement conditions.
- An exposed-surface stripping candidate; validate the actual resist and Cu/Ti/PI stack on samples.
- Suitable for research with defined compositions, interface structures and computational boundaries. RDL applications need a corresponding model.
- Assess representative conductive-film samples; configuration and pattern geometry determine applicability.
- For accessible positive/negative thick-resist removal, with actual resin, thermal history and metal/dielectric compatibility validated.
- ULVAC names large FO-PLP panels, resist, polyimide and residue treatment.
- Consider it for multilayer films and process coupons with suitable models, references and equipment configuration.
- Use accessible Kelvin terminals, matching range, current, probes and fixtures to the structure. Multichannel capability is model/option dependent.
- Prepared IC, bonding or material cross-sections, subject to preparation quality and detector configuration. Provide failure location, section target, preparation controls, elements and reference sections.
- WL-CSP/SiP redistribution and semiconductor organic passivation; grade, film thickness and stackup need confirmation. Provide WPR grade, thickness, exposure/develop, via geometry, cure/metal adhesion and electrical coupons.
- For wafer/panel RDL, buffer coatings and interlayer insulation. Low-temperature, thick-film and formulation properties vary by series. Provide grade/tone/thickness, via/exposure/develop, metals, cure/shrinkage and electrical coupons.
- Veeco lists flux cleaning, photoresist/dry-film stripping and via cleans for advanced packaging. Confirm the recipe for your material stack. Provide via geometry, residue identity, exposed dielectrics/metals, allowed solvent/temperature and clean-to-seed sequence.
Questions to discuss
- What are the Kelvin / chain sense scope and normal controls?
- Did the high reading occur initially or after thermal stress, and where is the targeted interface?
- How are opening formation, wait time, pre-clean, and seed histories kept comparable?
Public references
Tektronix / Keithley · Two-Wire vs. Four-Wire Resistance Measurements ↗A general measurement method; without accessible sense structures, it cannot isolate a single via, nor does it eliminate all layout or probe errors.
ASE · Failure Analysis Lab ↗The service list does not guarantee detection rates at every RDL or microvia scale; sampling, structures, and destructive risks require confirmation.
KLA / SPTS · SPTS Etch and Deposition Processes for Advanced Packaging ↗Manufacturer capabilities from 2022; TSV coverage does not establish coverage for arbitrary RDL vias, and no cleaning or opening recipe is provided for this topic.
Keysight Technologies · B2902C four-wire contact-resistance measurement ↗Scope and limitations Four-wire sensing does not isolate a buried contact without separate terminals. Fixtures and settings affect accuracy; capture of every transient open is not guaranteed. What to prepare BLNKK suggests structure and terminal drawings, expected resistance, allowable test current, temperature conditions and repeated measurements. Confirm with the supplier Confirm Kelvin fixtures, current/integration settings, thermal-EMF compensation, system uncertainty and time resolution.
Entegris · ST-250 copper post-etch residue cleaner ↗Scope and limitations Evidence does not qualify every RDL polymer or establish root cause from cleaning results. The datasheet explicitly prohibits IPA as an intermediate rinse. What to prepare BLNKK suggests documenting residues, films, temperature/time and rinsing, comparing metal loss, roughness, dielectric condition and contact resistance before/after cleaning. Confirm with the supplier Confirm material/equipment compatibility, opening-specific cleaning/rinse recipes, current safety/use documents and relevant evaluation data.
Chroma ATE · 16502 four-wire interconnect resistance comparison ↗Scope and limitations Chain resistance does not automatically isolate one via; display range is not single-via resolution. Control contacts, thermal EMF and self-heating. What to prepare BLNKK suggests preparing contact diagrams, chain counts, expected resistance, allowable current, fixtures and temperature records. Confirm with the supplier Confirm connections, zeroing, repeatability, pulse/dry-circuit conditions, temperature-compensation method and required options.
Nagase ChemteX · Nagase ChemteX N-SC238 dry-film resist stripper ↗Scope and limitations Vendor low-damage wording does not guarantee every stack or residue/ionic-cleanliness result. This is not buried-interface cleaning, electrical diagnosis or finished-via repair. What to prepare BLNKK suggests resist/thickness, stacks and strip/rinse/dry conditions, with surface-loss, ionic-residue and subsequent-resistance comparisons. Confirm with the supplier Confirm resist compatibility, process window, bath loading/replacement, rinse/dry method, current SDS and sample evaluation.
Synopsys · QuantumATK atomic-interface transport comparison ↗Scope and limitations Results depend on the modeled interface and method. Defects or contamination outside that model cannot be ruled out; calculations do not replace contact-resistance or process validation. What to prepare BLNKK suggests gathering metal/barrier compositions, interface assumptions, process differences and contact-resistance measurements for model-to-experiment comparison. Confirm with the supplier Confirm the required modules, interface construction, convergence checks, experimental calibration and deliverable transport analyses.
Filmetrics · Filmetrics R54 metal-film sheet-resistance comparison ↗Scope and limitations Probe configurations have different ranges. Thickness/resistivity conversion requires a known input; sheet resistance alone cannot establish both. What to prepare BLNKK suggests preparing material, thickness references, sample geometry, locations and process controls, alongside separate via Kelvin/chain data. Confirm with the supplier Confirm probes, geometric corrections, usable areas, calibration, conversion assumptions and outputs.
Tokyo Ohka Kogyo Co., Ltd. · TOK ST-120 thick-resist stripping solution ↗Scope and limitations It cannot expose buried interfaces or repair formed contacts. Low damage is not zero corrosion, and example conditions are not universal recipes. What to prepare BLNKK suggests gathering resist grade/thermal history, residue locations, stack materials, current soak/rinse processes and residue/contact-resistance baselines. Confirm with the supplier Confirm applicable resists, solution use/replacement, temperature/time and rinsing, plus criteria for residue, metal damage and electrical comparisons.
ULVAC, Inc. · NA-1500 panel organic-residue plasma removal ↗Scope and limitations Published uses do not qualify arbitrary blind vias or guarantee undamaged exposed materials. Residue and compatibility need sample validation. What to prepare BLNKK suggests preparing film, geometry, exposed-metal and temperature details, with before/after material-loss, surface and electrical observations. Confirm with the supplier Confirm panel/material suitability, recipe and temperature control, plus methods to validate internal residue and subsequent contact.
Rigaku · NEX CG II multilayer metal-film analysis ↗Scope and limitations Spot-averaged film data do not directly establish via-wall continuity, local oxidation states or electrical contact quality. What to prepare BLNKK suggests preparing the layer sequence, materials and estimated thicknesses, coupon dimensions and reference samples, with comparison locations. Confirm with the supplier Confirm the model, spot size, calibration/reference method and sample-specific measurement uncertainty.
HIOKI · RM3545A Kelvin resistance comparison ↗Scope and limitations Four terminals do not isolate every on-sample conductor contribution. One reading cannot locate a particular via; resolution is not total uncertainty. What to prepare BLNKK suggests Kelvin/reference structures, expected resistance, permitted current and temperature conditions to assess self-heating and fixture repeatability. Confirm with the supplier Confirm current/low-power settings, probes, fixtures, compensation, uncertainty and any switching options.
JEOL · JSM-IT810 SEM / EDS cross-section analysis ↗Scope and limitations Cross-section preparation alters the specimen; this is not intact-package non-destructive inspection. EDS does not directly determine contact resistance or bond strength. What to prepare BLNKK suggests failure locations, contact structures/electrical results, target elements, sacrificial samples and preparation records. Confirm with the supplier Confirm section targeting/preparation, EDS detection/quantification conditions, detectors and automation/calibration configuration.
JSR · ELPAC WPR photo-imageable dielectric ↗Scope and limitations Other developmental series appear in the same material; their specifications are not WPR specifications. Dielectric selection alone does not resolve contact resistance or guarantee reduced warpage. What to prepare BLNKK suggests film/via geometry, metals/interfaces, exposure/development flow, thermal budget and resistance-failure records. Confirm with the supplier Confirm WPR grade, development/cure conditions, residue and adhesion evaluation, material data, availability and process qualification.
Toray Industries · PHOTONEECE photodefinable polyimide ↗Scope and limitations The family name does not establish universally low cure temperature, low warpage or NMP-free chemistry. A patterned via does not establish clean contacts or acceptable resistance. What to prepare BLNKK suggests preparing features, thickness, metal surfaces, lithography equipment and cure budget, with adhesion, shrinkage, moisture and contact-resistance checks. Confirm with the supplier Confirm the exact grade, tone, solvent/developer and cure process. Request current TDS and relevant post-cure property, adhesion and reliability data.
Veeco · WaferStorm advanced-packaging wet processing ↗Scope and limitations Announcements establish applications and mechanism, not universal material compatibility. Residue removal does not establish lower contact resistance or higher bonding yield. What to prepare BLNKK suggests residues, upstream processing, via geometry, exposed materials, wafer format and permitted chemistry/damage limits, with before/after surface and electrical results. Confirm with the supplier Confirm trial recipe, immersion/spray setup, compatibility, handling and acceptance criteria. For RDL vias, agree on residue, metal-damage and contact-performance checks.