Warpage, voids or thermal resistance issues? Compare multiple solutions in one place. Assess what each solution does and where it applies. Identify missing information and key questions for your next technical discussion.
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Warpage reversal during cooling Selected paths in this example
Establish a measurement baseline Sample measurability is confirmed. Establish the heating and cooling baseline.
Assess model calibration Needs a full thermal history and repeatable reversal.
Prepare your next step Complete the heating and cooling measurements for a model calibration assessment.
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Warpage reversal during cooling Selected paths in this example
Establish a measurement baseline Sample measurability is confirmed. Establish the heating and cooling baseline.
Assess model calibration Needs a full thermal history and repeatable reversal.
Prepare your next step Complete the heating and cooling measurements for a model calibration assessment.
Explore the full example 54 engineering problemsStart with what you observed
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01 ↗ Voids / delamination 7 engineering problems 02 ↗ Functional test, screening and probing issues 2 engineering problems 03 ↗ Warpage / displacement / cracks 15 engineering problems 04 ↗ Topography / height / coplanarity / contact gap 7 engineering problems 05 ↗ Opens / resistance / interconnect margin / power transients 14 engineering problems 06 ↗ Shorts / leakage / insulation abnormalities 4 engineering problems 07 ↗ Thermal resistance / hotspots / coupled temperature rise 3 engineering problems 08 ↗ Particles / residue / fill and material distribution 8 engineering problems 09 ↗ Bond strength / cure and interface integrity 2 engineering problems 10 ↗ Optical coupling loss / optical drift 2 engineering problems 11 ↗ RF loss / electromagnetic and adjacent-line coupling 3 engineering problems
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Engineering problems16 RDL / microvia / bump / solder joint
Add the object and stage (optional) Which object or structure?Any / not sure yet Bond interface / underfill / sealant · 20 RDL / microvia / bump / solder joint · 16 TSV / through-silicon via and insulation · 4 SiC ingots and as-sliced wafers · 1 Wafer / die / chiplet / cut surface · 19 HBM / memory stack · 2 Package / substrate / module / heat spreader · 19 Mould / moulding flow path / resin-exclusion area · 3 Fibre / coupler / optical interface · 2 PDN / RF / interposer / shielding · 4 At which stage?Any / not sure yet Moulding / filling / bonding / assembly · 7 Exposure / plating / CMP / surface preparation · 4 Reflow / thermal ramps / thermal cycling / annealing · 8 Operating load / power cycling / transients · 2 Thinning / backgrinding / TSV reveal / carrier debonding · 0 Damp heat / drying / bias / mechanical reliability · 5 Handling / dicing / singulation / equipment loading · 1 Upstream ingot slicing and substrate preparation · 0 Design / initial inspection / electrical and multiport validation · 6
Showing 6 of 16 problems
Reset filters 08 Intermittent opens in stacked substrate microvias after reflow Use continuity data throughout the thermal history to locate weak interfaces; room-temperature cross-sections alone cannot support release.
Organic-substrate stacked microvias and target-pad interfaces · Reflow thermal history and room-temperature recovery Choose this problem → 09 Cracking and intermittent opens in fine-line RDL after thermal cycling Locate electrical anomalies in routing regions, then evaluate thermomechanical stress using stackup and material data.
Fine-line multilayer RDL conductors and vias · Thermal cycling and reliability stress Choose this problem → 10 Non-wetting, cold joints and opens in HBM thermocompression bonding Align joint-defect maps with temperature, pressure, and tilt records before evaluating bonding windows or surface treatment.
HBM thermocompression-bonded microbump joints · Per-die post-TCB inspection Choose this problem → 12 Voltage drop and progressive resistance degradation in high-current microbumps or copper pillars Align current, temperature, and localized electrical data, then separate EM / IR analysis from physical failure localization.
Microbumps / Cu pillars and interlayer power interconnects · High-current / high-temperature operation and time stress Choose this problem → 13 BGA head-in-pillow open joints Identify the unfused interface, then compare reflow thermal geometry, supply / placement, and wetting separately.
Package-ball / board-paste interface · First electrical test after board reflow Choose this problem → 18 RDL line-to-line shorts after fabrication Confirm initial post-fabrication shorts, then use development, plating, and seed-removal morphology to prioritize inspection.
Adjacent RDL lines and residual conductors · First inspection after exposure, plating, and seed removal Choose this problem → Show 6 problems ↓ remaining 10 Know the problem scope? Explore six technology directions Technology directions help you explore methods. They do not establish a standard solution or sample suitability.
Technology directionAll directions Measurement, inspection and failure localization Simulation, modelling and life prediction Material properties and interface design Process equipment and window control Package structures and deformation compensation Reliability validation and failure analysis Before you get started What will I get from Navigator? Explore technical paths and candidates related to an engineering problem. Compare intended uses, applicability and sources, identify missing information and key questions, and download an assessment preparation summary. These outputs help you prepare your next technical assessment. Applicability still requires samples, measurements and supplier confirmation.
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