SOLUTION NAVIGATOREngineering conditions
For “Local interface voids after hybrid bonding”, add details that may change the assessment order and check the basis and limits of each candidate.
Engineering conditions
Confirm the first detection station, same-batch coordinate registration, and actual detection window. These conditions determine evaluation order; they do not establish a void root cause.
Live assessment
First use representative reference samples to confirm resolution, false positives, and sampling conditions.
Unconfirmed: Has the detection window for the actual stack, materials, and defect sizes been validated with reference samples?First establish same-batch pre- and post-bond coordinates and defect classifications.
Unconfirmed: Can pre- and post-bond data be registered in the same wafer / die coordinate system?Confirm that topography and void data share coordinates and sampling coverage first.
Unconfirmed: Can pre- and post-bond data be registered in the same wafer / die coordinate system?Confirm the first detection station before defining the process DOE scope.
Unconfirmed: At which station was the void or corresponding anomaly first visible?candidate solutions
The order changes only with conditions you confirm. Public information cannot establish suitability for your actual samples.
After cross-station or staged inspection, select the clearest spatial / temporal relationship. Registration, first detection station, and detection window guide the next step; overlap does not establish causality.
Spatial / temporal relationships between voids, pre-bond defects, topography, and annealing narrow validation scope. Overlap, first detection, or growth alone cannot prove a process root cause.
Based on reported conditions and public sources. Ready to assess does not establish sample applicability or root cause. Order does not identify the best solution.
First use representative reference samples to confirm resolution, false positives, and sampling conditions.
First establish same-batch pre- and post-bond coordinates and defect classifications.
No result provided. Clarify key conditions before arranging an assessment.
Onto Innovation · EchoScan and 3Di product announcement ↗This is a manufacturer launch statement, not third-party validation. Actual sensitivity, throughput, and false positives require user-sample confirmation.
Onto Innovation · Dragonfly G3 inspection and metrology ↗The product page supports pre-bond process-control use. It does not claim independent hybrid-bond void root-cause identification; cross-station registration must be established separately.
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Related solutions
Onto Innovation
The manufacturer positions it as noncontact wafer-bond void inspection, making it a baseline candidate for post-bond and post-anneal defect maps.
Basis: Manufacturer product launch and hybrid-bond process-control resourcesThe reviewed public information describes a workflow. It has not been linked to a specific product in the BLNKK solution catalogue.
Onto Innovation
Include bump / pad, surface-defect, and 3D metrology in upstream control and correlate locations with post-bond void maps.
Basis: Manufacturer 3D interconnect process-control resourcesThe reviewed public information describes a workflow. It has not been linked to a specific product in the BLNKK solution catalogue.
KLA
Combine defect inspection, wafer topography, edge inspection, and 2D / 3D metrology as an alternative cross-station process-control approach.
Basis: Manufacturer advanced-packaging technology and product resourcesThe reviewed public information describes a workflow. It has not been linked to a specific product in the BLNKK solution catalogue.
Nordson Test & Inspection
Acoustic inspection and failure analysis for interface delamination and voids, with tradeoffs against nonimmersion methods.
Basis: Manufacturer acoustic microscopy product resourcesThe reviewed public information describes a workflow. It has not been linked to a specific product in the BLNKK solution catalogue.
EV Group
Treat surface preparation, alignment, pre-bonding, and annealing as one process chain for DOE-based investigation of void origins.
Basis: Manufacturer hybrid-bonding technical resourcesThe reviewed public information describes a workflow. It has not been linked to a specific product in the BLNKK solution catalogue.
FUJIFILM Electronic Materials
Hybrid-bonding surfaces require controlled copper recess and dielectric profiles when comparing CMP conditions.
Basis: The named product entry describes recess and surface-profile control. A September 2025 release provides copper/oxide hybrid-bonding CMP context without naming this grade.Applied Materials
Assess copper/dielectric height differences in TSV planarization and hybrid-bond surfaces alongside contamination and bonding results.
Basis: The product page documents platform capabilities; the IMAPS presentation illustrates CMP/barrier-profile co-optimization.SUSS MicroTec
Compare force, temperature and contact propagation during permanent wafer bonding.
Basis: The product page and 2026-version datasheet document controls/SSR and configuration-dependent specifications.Nearfield Instruments
Bonded-interface review needs evidence beyond exposed topography.
Basis: Official content explains acoustic/elasticity modes, customer-specific recipes and ordering availability.Entegris
Comparing pre-bond copper planarization requires checking copper recess, surrounding dielectric topography and post-process defects.
Basis: Entegris identifies copper, CMP and advanced packaging on the official page, without publishing complete grade-specific process windows.Entegris
Pad contact characteristics and consumable condition are process variables when comparing surface topography after pre-bond CMP.
Basis: Entegris’s official page and two-page data sheet identify material, hardness, porosity, series and IC CMP applications.Onto Innovation
Compare post-bond void locations and inspection configuration.
Basis: The January 14, 2025 news release describes introduction to selected customers, not established current general availability.JSR
Compare prebond CMP materials for metal/dielectric removal and topography control.
Basis: The page describes selectivity, dispersion and removal-rate control, without a named Cu-hybrid-bonding grade.PVA TePla
Commission bonded-interface observations when in-house acoustic equipment is unavailable, comparing suspect samples with controls or process variants.
Basis: The service page documents tailored strategies, internal-defect/interface imaging and reporting, without specific thin hybrid-interface resolution or detection qualification.Lam Research
Bonding abnormalities with evidence of edge contamination need comparisons of residues and bevel protection.
Basis: The manufacturer lists bevel etch/deposition, 3D-bonding edge support and wafer-bonding gap fill.Intel Foundry
This foundry integration architecture is a candidate architecture/service discussion for a hybrid-bond flow, not a cleaning/inspection instrument or universal void cure.
Basis: Intel’s packaging page and November 2025 Direct 3D technology brief describe vertical hybrid bonding and EMIB 3.5D integration. The dedicated brief is the evidence for this solution; Foveros 2.5D literature is not substituted for it.Applied Materials
The integrated flow explicitly couples surface preparation and die placement; supports actual process-window trials, without guaranteeing a void-free bond.
Basis: The product page documents the modules and collaboration with Besi; the October 2025 release reports use by logic, memory and OSAT customers. Neither establishes a yield guarantee for arbitrary stacks.ASM International
Bonding-dielectric deposition supports integration planning before CMP, cleaning and bonding.
Basis: The product page lists four DCMs/eight reaction chambers and describes hybrid-bonding SiCN, thick/thin SiO and low-temperature, high-compressive-stress SiN. Claimed bonding and warpage benefits need project-specific validation.References
Onto Innovation launched EchoScan for wafer-bond void detection, claiming atmospheric, noncontact, immersion-free detection of voids as small as 1 µm.
Limit: This is a manufacturer launch statement, not third-party validation. Actual sensitivity, throughput, and false positives require user-sample confirmation.Onto Innovation describes Dragonfly G3 as combining 2D defect inspection, infrared subsurface inspection, and multiple 3D measurements for reconstructed and bonded wafers, microbumps, and Cu pillars.
Limit: The product page supports pre-bond process-control use. It does not claim independent hybrid-bond void root-cause identification; cross-station registration must be established separately.KLA's advanced-packaging portfolio includes wafer-level and component-level inspection, metrology, and process control.
Limit: A portfolio page cannot establish that a specific model detects these void sizes. Resolution and structural applicability require instrument-specific checks.KLA investor technical resources list hybrid-bond void and nonuniformity sources including surface defects, deposition, dicing profiles, CMP topography, wafer shape, Cu-pad misalignment, and bonding temperature.
Limit: The material describes inspection and metrology challenges, not guaranteed resolution, throughput, or defect detection for a specific instrument.KLA product announcements describe advanced-packaging inspection and metrology support for shrinking features, 3D structures, defect inspection, and quality control.
Limit: The announcement spans multiple products and process stations. It cannot establish that every system is suitable for hybrid-bond void inspection.Nordson describes AW Series automated bonded-wafer inspection, quantification of unbonded regions and voids, and staged inspection after bonding, annealing, and thinning.
Limit: Official sensitivity and nonimmersion characteristics require confirmation against material acoustic windows, sample dimensions, and inspection configurations.Nordson D9650Z provides C-SAM capabilities, officially positioned for bond integrity and failure analysis.
Limit: The D9650Z page primarily emphasizes power modules. Confirm sample loading, frequency, resolution, and coupling before use on hybrid-bonded wafers.EV Group describes hybrid bonding as dielectric pre-bonding, precision alignment, and subsequent annealing to form mechanical and electrical connections, with W2W and D2W applications.
Limit: The technology page supports the process chain and equipment categories. It does not prove any single condition caused these voids; defect feedback and controlled experiments remain necessary.The named product entry describes recess and surface-profile control. A September 2025 release provides copper/oxide hybrid-bonding CMP context without naming this grade.
Limit: Scope and limitations Slurry is neither metrology nor a repair for bonded voids. Polishing performance alone does not qualify cleanliness, activation or subsequent bonding. What to prepare BLNKK suggests documenting films, recess/profile targets, pattern density, pads and existing recipes, with before/after measurements and defect maps. Confirm with the supplier Confirm applicable formulations, removal/selectivity windows, corrosion/defect data, and integration with the actual post-cleaning and bonding flow.The product page documents platform capabilities; the IMAPS presentation illustrates CMP/barrier-profile co-optimization.
Limit: Scope and limitations Case-study heights and yields are not universal equipment specifications. CMP surface control does not replace cleaning, bonding or electrical qualification. What to prepare BLNKK suggests preparing film stacks, pattern density, incoming profiles, dishing targets and existing slurry/pad choices, with post-polish topography, particle and bonding comparisons. Confirm with the supplier Confirm material recipes, endpoint/profile options, cleaning compatibility and measurement methods before jointly defining sample trials and bonding-surface acceptance.The product page and 2026-version datasheet document controls/SSR and configuration-dependent specifications.
Limit: Scope and limitations Universal bonding does not qualify arbitrary Cu-hybrid interfaces; specifications are not necessarily valid simultaneously. What to prepare BLNKK suggests preparing modes, surfaces/topography, stacks, actual thermal/force histories and void/alignment/electrical comparisons. Confirm with the supplier Confirm tooling/configuration, interface preparation, annealing, wafer conditions and bond-quality validation.Official content explains acoustic/elasticity modes, customer-specific recipes and ordering availability.
Limit: Scope and limitations Scan step is not detectable-void diameter. Public examples do not qualify every bonded stack or assembled package; validate depth, contrast and false indications. What to prepare BLNKK suggests preparing stacks, materials/thicknesses, target depths/defects, accessible surfaces and good/defective specimens with reference analysis. Confirm with the supplier Confirm frequencies, sensing modes, recipes and scan areas; discuss representative-defect detection, repeatability and result validation.Entegris identifies copper, CMP and advanced packaging on the official page, without publishing complete grade-specific process windows.
Limit: Scope and limitations No hybrid-bonding roughness, recess or particle acceptance limits are given. Upstream planarization is not a repair for existing bond voids. What to prepare BLNKK suggests preparing copper/dielectric patterns, target topography, pad and process conditions, and measurements after CMP and cleaning. Confirm with the supplier Confirm the formulation and compatibility with the pad and cleaning flow, and how removal, recess, erosion and defects will be validated.Entegris’s official page and two-page data sheet identify material, hardness, porosity, series and IC CMP applications.
Limit: Scope and limitations Family-level compatibility does not qualify a particular hybrid-bonding stack. Bonding roughness or release thresholds are not supplied. What to prepare BLNKK suggests preparing the stack and patterns, slurry and conditioning/process conditions, plus wafer topography, recess and defect data. Confirm with the supplier Confirm the series, hardness and porosity, conditioning method, wear monitoring and validation approach for the actual process.The page describes selectivity, dispersion and removal-rate control, without a named Cu-hybrid-bonding grade.
Limit: Scope and limitations General CMP capability does not qualify a hybrid-bond surface or repair existing bond voids; assess topography, roughness and residues. What to prepare BLNKK suggests preparing stack/target topography, pad/process conditions and matched pre/post-CMP and post-clean measurements. Confirm with the supplier Confirm grade, selectivity, dishing/erosion control, polishing/cleaning compatibility, samples and technical data.The service page documents tailored strategies, internal-defect/interface imaging and reporting, without specific thin hybrid-interface resolution or detection qualification.
Limit: Scope and limitations Acoustic anomalies alone do not establish void causes or visibility of every thin interface. General laboratory material/size coverage is not stack-specific validation. What to prepare BLNKK suggests preparing stack/material/thickness details, target interfaces, suspect/control locations and existing images. Describe sample handling and whether coupling-liquid exposure is acceptable. Confirm with the supplier Confirm acoustic access, sample/coupling compatibility and target-defect visibility. Agree on scanning, interpretation, image/raw-data deliverables and complementary checks.The manufacturer lists bevel etch/deposition, 3D-bonding edge support and wafer-bonding gap fill.
Limit: Scope and limitations Bevel treatment does not clean the entire bond face. Family features are configuration-dependent and do not identify unexplained void causes. What to prepare BLNKK recommends preparing edge stacks, particle/void locations, surrounding processes and carrier information for contamination-path and sample comparisons. Confirm with the supplier Confirm model, material compatibility, processing extent, active-area protection, edge profiles and trial validation.Intel’s packaging page and November 2025 Direct 3D technology brief describe vertical hybrid bonding and EMIB 3.5D integration. The dedicated brief is the evidence for this solution; Foveros 2.5D literature is not substituted for it.
Limit: Scope and limitations A co-designed foundry platform, not a standalone part. Node/design restrictions apply; customer warpage, thermal resistance and bond yield are not guaranteed by positioning claims. What to prepare BLNKK suggests preparing dies/nodes, interconnect/power, thickness/stack-up, cooling, interfaces and test/reliability targets. Confirm with the supplier Confirm nodes/rules, access/schedule, qualified stacks/bonding, thermomechanical data, test strategy and EMIB combinations.The product page documents the modules and collaboration with Besi; the October 2025 release reports use by logic, memory and OSAT customers. Neither establishes a yield guarantee for arbitrary stacks.
Limit: Scope and limitations Integration does not replace incoming-surface or bond-structure quality control and does not guarantee void-free bonding. In-situ annealing and other enhancements appear on the product roadmap rather than as universal installed features. What to prepare BLNKK suggests preparing die/wafer materials, interconnect layout, surface topography and cleanliness, activation-to-bond delays, and alignment/post-bond inspection data for process-window comparisons. Confirm with the supplier Confirm supported materials and stacks, currently supplied cleaning/activation/metrology modules, and bonding/alignment conditions. Also confirm annealing arrangements, acceptance methods and traceability deliverables.The product page lists four DCMs/eight reaction chambers and describes hybrid-bonding SiCN, thick/thin SiO and low-temperature, high-compressive-stress SiN. Claimed bonding and warpage benefits need project-specific validation.
Limit: Scope and limitations Tunable film stress does not ensure low warpage of an entire wafer/package or void-free bonding. The reviewed pages do not provide a universally applicable temperature, roughness or stress window; downstream integration matters. What to prepare BLNKK suggests preparing target SiCN/SiO/SiN films, substrate stack and thermal budget, thickness/stress/uniformity targets, and comparisons of post-planarization roughness, adhesion, cleanliness and bond voids. Confirm with the supplier Confirm precursor/chamber configuration, usable temperature and film-property ranges, measurement/acceptance methods, chamber matching, and compatibility with CMP, activation and bonding.Before assessment